ELIOT1 HAL
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hal_dma.h
См. документацию.
1
20#ifndef HAL_DMA_H
21#define HAL_DMA_H
22
23#include "hal_common.h"
24
28#define HAL_DMA_DRIVER_VERSION (MAKE_VERSION(1, 0, 0))
29
31#define DMA_AHB_MAX_BLOCK_SIZE (4095U)
33#define HAL_FEATURE_DMA_NUMBER_OF_CHANNELS (8U)
35#define HAL_FEATURE_DMA_MAX_NUMBER_HW_HANDSHAKES (16U)
37#define HAL_FEATURE_DMA_ALL_CHANNELS (HAL_FEATURE_DMA_NUMBER_OF_CHANNELS * 2U)
39#define HAL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE (4U)
41#define DMA_ALLOCATE_HEAD_DESCRIPTORS(name, number) \
42 dma_descriptor_t name[number] __attribute__((aligned(HAL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE)))
44#define REG_OFFSET (0x58)
45
47#define DMA_HANDSHAKE_UART0_TX (0U)
49#define DMA_HANDSHAKE_UART0_RX (1U)
51#define DMA_HANDSHAKE_UART1_TX (2U)
53#define DMA_HANDSHAKE_UART1_RX (3U)
55#define DMA_HANDSHAKE_UART2_TX (0U)
57#define DMA_HANDSHAKE_UART2_RX (1U)
59#define DMA_HANDSHAKE_UART3_TX (2U)
61#define DMA_HANDSHAKE_UART3_RX (3U)
62
64#define DMA_HANDSHAKE_SPI0_TX (4U)
66#define DMA_HANDSHAKE_SPI0_RX (5U)
68#define DMA_HANDSHAKE_SPI1_TX (6U)
70#define DMA_HANDSHAKE_SPI1_RX (7U)
72#define DMA_HANDSHAKE_SPI2_TX (8U)
74#define DMA_HANDSHAKE_SPI2_RX (9U)
75
77#define DMA_HANDSHAKE_I2C0_TX (10U)
79#define DMA_HANDSHAKE_I2C0_RX (11U)
81#define DMA_HANDSHAKE_I2C1_TX (12U)
83#define DMA_HANDSHAKE_I2C1_RX (13U)
85#define DMA_HANDSHAKE_QSPI_TX (14U)
87#define DMA_HANDSHAKE_QSPI_RX (15U)
88
89
91#define DMA_CHANNEL_CTL_BLOCKSIZE_MASK (0xFFF00000000ULL)
92#define DMA_CHANNEL_CTL_BLOCKSIZE_SHIFT (32ULL)
97#define DMA_CHANNEL_CTL_BLOCKSIZE(x) (((uint64_t)((uint64_t)(x)) << DMA_CHANNEL_CTL_BLOCKSIZE_SHIFT) & DMA_CHANNEL_CTL_BLOCKSIZE_MASK)
98
116#define DMA_CHANNEL_CTL(blockSize, srcEnChain, dstEnChain, transferType, \
117 scatter, gather, srcMSize, dstMSize, sInc, dInc, \
118 srcTransferWidth, dstTransferWidth, int_en) \
1190x0ULL | DMA_CHANNEL_CTL_BLOCKSIZE(blockSize) | \
120DMA_CTL0_LO_LLP_SRC_EN_VAL(srcEnChain) | \
121DMA_CTL0_LO_LLP_DST_EN_VAL(dstEnChain) | \
122DMA_CTL0_LO_TT_FC_VAL(transferType) | \
123DMA_CTL0_LO_DST_SCATTER_EN_VAL(scatter) | \
124DMA_CTL0_LO_SRC_GATHER_EN_VAL(gather) | \
125DMA_CTL0_LO_SRC_MSIZE_VAL(srcMSize) | \
126DMA_CTL0_LO_DEST_MSIZE_VAL(dstMSize) | \
127DMA_CTL0_LO_SINC_VAL(sInc) | \
128DMA_CTL0_LO_DINC_VAL(dInc) | \
129DMA_CTL0_LO_SRC_TR_WIDTH_VAL(srcTransferWidth) | \
130DMA_CTL0_LO_DST_TR_WIDTH_VAL(dstTransferWidth) | \
131DMA_CTL0_LO_INT_EN_VAL(int_en)
132
136enum {
137 DMA_Transfer8BitWidth = 0U,
138 DMA_Transfer16BitWidth = 1U,
139 DMA_Transfer32BitWidth = 2U,
140 DMA_Transfer64BitWidth = 3U,
141 DMA_Transfer128BitWidth = 4U,
142 DMA_Transfer256BitWidth = 5U,
143};
144
148enum {
149 DMA_BurstSize1 = 0U,
150 DMA_BurstSize4 = 1U,
151 DMA_BurstSize8 = 2U,
152 DMA_BurstSize16 = 3U,
153 DMA_BurstSize32 = 4U,
154 DMA_BurstSize64 = 5U,
155 DMA_BurstSize128 = 6U,
156 DMA_BurstSize256 = 7U,
157};
158
162enum {
163 DMA_Incr = 0U,
164 DMA_Decr = 1U,
165 DMA_NoChange = 2U,
166};
167
177
191
206
220
222typedef struct _dma_descriptor {
223 __IOM uint32_t SAR;
224 __IOM uint32_t DAR;
225 __IOM uint32_t LLP;
226 __IOM uint32_t CTL_LO;
227 __IOM uint32_t CTL_HI;
228 __IOM uint32_t SSTAT;
229 __IOM uint32_t DSTAT;
230} dma_descriptor_t;
231
233typedef struct _dma_channel_reg {
234 __IOM uint32_t SAR_LO;
235 __IOM uint32_t SAR_HI;
236 __IOM uint32_t DAR_LO;
237 __IOM uint32_t DAR_HI;
238 __IOM uint32_t LLP_LO;
239 __IOM uint32_t LLP_HI;
240 __IOM uint32_t CTL_LO;
241 __IOM uint32_t CTL_HI;
242 __IOM uint32_t SSTAT_LO;
243 __IOM uint32_t SSTAT_HI;
244 __IOM uint32_t DSTAT_LO;
245 __IOM uint32_t DSTAT_HI;
246 __IOM uint32_t SSTATAR_LO;
247 __IOM uint32_t SSTATAR_HI;
248 __IOM uint32_t DSTATAR_LO;
249 __IOM uint32_t DSTATAR_HI;
250 __IOM uint32_t CFG_LO;
251 __IOM uint32_t CFG_HI;
252 __IOM uint32_t SGR_LO;
253 __IOM uint32_t SGR_HI;
254 __IOM uint32_t DSR_LO;
255 __IOM uint32_t DSR_HI;
256} dma_channel_regs;
257
274
286
287struct _dma_handle;
288
290typedef void (*dma_callback)(struct _dma_handle *handle, void *user_data,
291 dma_irq_t intmode);
292
302
322
333void DMA_Init(DMA_Type *base);
334
340void DMA_Deinit(DMA_Type *base);
341
352dma_status_t DMA_CreateHandle(dma_handle_t *handle, DMA_Type *base,
353 uint32_t channel);
354
361static inline void DMA_EnableChannel(DMA_Type *base, uint32_t channel)
362{
363 base->CHENREG_LO |= (uint32_t)((1 << (channel + 8)) | (1 << channel));
364}
365
372void DMA_DisableChannel(DMA_Type *base, uint32_t channel);
373
380static inline void DMA_EnableChannelPeriphRq(DMA_Type *base,
381 uint32_t channel)
382{
383 base->REQDSTREG_LO = ((1 << (channel + 8)) | (1 << channel));
384 base->REQSRCREG_LO = ((1 << (channel + 8)) | (1 << channel));
385}
386
394void DMA_HardwareHandshakeEnable(dma_handle_t *handle, bool enable,
395 uint32_t req_num);
396
404void DMA_SetChannelPriority(DMA_Type *base, uint32_t channel,
405 dma_priority_t priority
406);
407
415void DMA_SetCallback(dma_handle_t *handle, dma_callback callback,
416 void *user_data);
417
426static inline bool DMA_ChannelIsActive(DMA_Type *base, uint32_t channel)
427{
428 return ((base->CHENREG_LO >> channel) & 1);
429}
430
448dma_priority_t DMA_GetChannelPriority(DMA_Type *base, uint32_t channel);
449
457uint64_t DMA_GetCTLCfgMask(struct dma_channel_ctl_cfg *ctlxcfg);
458
469void DMA_PrepareChannelTransfer(dma_channel_config_t *config,
470 void *src_addr,
471 void *dst_addr,
472 uint64_t xfer_cfg
473);
474
503dma_status_t DMA_SubmitChannelTransfer(dma_handle_t *handle,
504 dma_channel_config_t *config
505);
506
533void DMA_SubmitChannelDescriptor(dma_handle_t *handle,
534 dma_descriptor_t *descriptor
535);
536
545uint32_t DMA_GetDescriptorCount(uint32_t size_bytes, uint8_t transfer_width);
546
552void DMA_AbortTransfer(dma_handle_t *handle);
553
567dma_status_t DMA_StartTransfer(dma_handle_t *handle);
568
580void DMA_EnableChannelInterrupt(DMA_Type *base, uint32_t channel,
581 uint8_t int_mask);
582
590void DMA_DisableChannelInterrupt(DMA_Type *base, uint32_t channel,
591 uint8_t int_mask);
592
602void DMA_SetupDescriptor(dma_descriptor_t *desc, uint64_t xfercfg,
603 void *src_addr, void *dst_addr,
604 void *next_desc
605);
606
636dma_status_t DMA_SubmitChannelTransferParameter(dma_handle_t *handle,
637 uint64_t xfer_cfg, void *src_addr, void *dst_addr
638);
639
645void DMA_ChannelIRQHandle(dma_handle_t *handle);
646
654void DMA_ScatterGatherEnable(struct dma_channel_ctl_cfg *ctlxcfg,
655 bool scatter_en, bool gather_en);
656
664void DMA_SetupSrcGather(dma_handle_t *handle, uint32_t count, uint32_t interval);
665
673void DMA_SetupDstScatter(dma_handle_t *handle, uint32_t count, uint32_t interval);
674
681void DMA_InitMultiblockDescriptor(dma_descriptor_t *desc,
682 dma_multiblock_config_t *config);
683
688#endif /* HAL_DMA_H */
689
DMA_ChannelIsActive
static bool DMA_ChannelIsActive(DMA_Type *base, uint32_t channel)
Функция для проверки работы DMA канала
Definition hal_dma.h:426
DMA_SubmitChannelTransfer
dma_status_t DMA_SubmitChannelTransfer(dma_handle_t *handle, dma_channel_config_t *config)
Отправление конфигурации передачи
dma_multiblock_config_t
struct _dma_multiblock_config dma_multiblock_config_t
Конфигурация многоблочной передачи
_dma_status
_dma_status
Статусы возврата из функций для драйвера DMA.
Definition hal_dma.h:171
dma_channel_config_t
struct _dma_channel_config dma_channel_config_t
Конфигурация канала DMA.
DMA_PrepareChannelTransfer
void DMA_PrepareChannelTransfer(dma_channel_config_t *config, void *src_addr, void *dst_addr, uint64_t xfer_cfg)
Подготовка канала к передаче
dma_priority_t
enum _dma_priority dma_priority_t
Приоритеты каналов
DMA_AbortTransfer
void DMA_AbortTransfer(dma_handle_t *handle)
Прерывание передачи без потери данных
DMA_SetChannelPriority
void DMA_SetChannelPriority(DMA_Type *base, uint32_t channel, dma_priority_t priority)
Установка приоритета канала
dma_channel_regs
struct _dma_channel_reg dma_channel_regs
Дескриптор на регистры канала DMA.
DMA_StartTransfer
dma_status_t DMA_StartTransfer(dma_handle_t *handle)
Начать транзакцию
dma_irq_t
enum _dma_int dma_irq_t
Источники прерываний DMA.
DMA_DisableChannelInterrupt
void DMA_DisableChannelInterrupt(DMA_Type *base, uint32_t channel, uint8_t int_mask)
Отключение источника прерывания
DMA_Deinit
void DMA_Deinit(DMA_Type *base)
Отключение DMA.
_dma_priority
_dma_priority
Приоритеты каналов
Definition hal_dma.h:181
dma_transfer_type_t
enum _dma_transfer_type dma_transfer_type_t
Тип пересылок DMA и управление размером блока
DMA_GetChannelPriority
dma_priority_t DMA_GetChannelPriority(DMA_Type *base, uint32_t channel)
Получение информации о приоритете канала
DMA_EnableChannelInterrupt
void DMA_EnableChannelInterrupt(DMA_Type *base, uint32_t channel, uint8_t int_mask)
Разрешение источника прерывания
DMA_ScatterGatherEnable
void DMA_ScatterGatherEnable(struct dma_channel_ctl_cfg *ctlxcfg, bool scatter_en, bool gather_en)
Разрешение режимов Разброса/Сбора
_dma_transfer_type
_dma_transfer_type
Тип пересылок DMA и управление размером блока
Definition hal_dma.h:210
DMA_EnableChannel
static void DMA_EnableChannel(DMA_Type *base, uint32_t channel)
Активация канала
Definition hal_dma.h:361
_dma_int
_dma_int
Источники прерываний DMA.
Definition hal_dma.h:195
DMA_EnableChannelPeriphRq
static void DMA_EnableChannelPeriphRq(DMA_Type *base, uint32_t channel)
Установка запроса на передачу с периферией
Definition hal_dma.h:380
DMA_SubmitChannelTransferParameter
dma_status_t DMA_SubmitChannelTransferParameter(dma_handle_t *handle, uint64_t xfer_cfg, void *src_addr, void *dst_addr)
Отправка конфигурации передачи в таблицу дескрипторов
DMA_InitMultiblockDescriptor
void DMA_InitMultiblockDescriptor(dma_descriptor_t *desc, dma_multiblock_config_t *config)
Функция, инициализирующая DMA дескрипторы многоблочной передачи.
DMA_SetupDstScatter
void DMA_SetupDstScatter(dma_handle_t *handle, uint32_t count, uint32_t interval)
Настройка режима разброса приемника
DMA_GetCTLCfgMask
uint64_t DMA_GetCTLCfgMask(struct dma_channel_ctl_cfg *ctlxcfg)
Получение маски для конфигурации пересылки
dma_status_t
enum _dma_status dma_status_t
Статусы возврата из функций для драйвера DMA.
dma_handle_t
struct _dma_handle dma_handle_t
Управляющая структура передачи
DMA_SubmitChannelDescriptor
void DMA_SubmitChannelDescriptor(dma_handle_t *handle, dma_descriptor_t *descriptor)
Отправка дескриптора передачи
DMA_CreateHandle
dma_status_t DMA_CreateHandle(dma_handle_t *handle, DMA_Type *base, uint32_t channel)
Инициализация структуры dma_handle_t.
dma_callback
void(* dma_callback)(struct _dma_handle *handle, void *user_data, dma_irq_t intmode)
Функция обратного вызова
Definition hal_dma.h:290
DMA_SetupSrcGather
void DMA_SetupSrcGather(dma_handle_t *handle, uint32_t count, uint32_t interval)
Настройка режима сбора источника
DMA_Init
void DMA_Init(DMA_Type *base)
Включение DMA.
DMA_ChannelIRQHandle
void DMA_ChannelIRQHandle(dma_handle_t *handle)
Обработчик прерываний
DMA_SetupDescriptor
void DMA_SetupDescriptor(dma_descriptor_t *desc, uint64_t xfercfg, void *src_addr, void *dst_addr, void *next_desc)
Инициализация дескриптора
dma_descriptor_t
struct _dma_descriptor dma_descriptor_t
Описатель следующего блока DMA (LLI)
DMA_GetDescriptorCount
uint32_t DMA_GetDescriptorCount(uint32_t size_bytes, uint8_t transfer_width)
Расчёт количества дескрипторов многоблочной передачи
DMA_HardwareHandshakeEnable
void DMA_HardwareHandshakeEnable(dma_handle_t *handle, bool enable, uint32_t req_num)
Установка аппаратного интерфейса запроса DMA.
DMA_DisableChannel
void DMA_DisableChannel(DMA_Type *base, uint32_t channel)
Выключение канала
DMA_SetCallback
void DMA_SetCallback(dma_handle_t *handle, dma_callback callback, void *user_data)
Установка функции обратного вызова
DMA_Status_NoBase
@ DMA_Status_NoBase
Definition hal_dma.h:174
DMA_Status_Fail
@ DMA_Status_Fail
Definition hal_dma.h:175
DMA_Status_Busy
@ DMA_Status_Busy
Definition hal_dma.h:173
DMA_Status_Success
@ DMA_Status_Success
Definition hal_dma.h:172
DMA_Decr
@ DMA_Decr
Definition hal_dma.h:164
DMA_NoChange
@ DMA_NoChange
Definition hal_dma.h:165
DMA_Incr
@ DMA_Incr
Definition hal_dma.h:163
DMA_ChannelPriority0
@ DMA_ChannelPriority0
Definition hal_dma.h:182
DMA_ChannelPriority3
@ DMA_ChannelPriority3
Definition hal_dma.h:185
DMA_ChannelPriority7
@ DMA_ChannelPriority7
Definition hal_dma.h:189
DMA_ChannelPriority6
@ DMA_ChannelPriority6
Definition hal_dma.h:188
DMA_ChannelPriority5
@ DMA_ChannelPriority5
Definition hal_dma.h:187
DMA_ChannelPriority4
@ DMA_ChannelPriority4
Definition hal_dma.h:186
DMA_ChannelPriority1
@ DMA_ChannelPriority1
Definition hal_dma.h:183
DMA_ChannelPriority2
@ DMA_ChannelPriority2
Definition hal_dma.h:184
DMA_PeripheralToPeripheral_DMA
@ DMA_PeripheralToPeripheral_DMA
Definition hal_dma.h:214
DMA_PeripheralToMemory_Peripheral
@ DMA_PeripheralToMemory_Peripheral
Definition hal_dma.h:215
DMA_MemoryToPeripheral_Peripheral
@ DMA_MemoryToPeripheral_Peripheral
Definition hal_dma.h:217
DMA_MemoryToMemory_DMA
@ DMA_MemoryToMemory_DMA
Definition hal_dma.h:211
DMA_PeripheralToMemory_DMA
@ DMA_PeripheralToMemory_DMA
Definition hal_dma.h:213
DMA_PeripheralToPeripheral_DST
@ DMA_PeripheralToPeripheral_DST
Definition hal_dma.h:218
DMA_PeripheralToPeripheral_SRC
@ DMA_PeripheralToPeripheral_SRC
Definition hal_dma.h:216
DMA_MemoryToPeripheral_DMA
@ DMA_MemoryToPeripheral_DMA
Definition hal_dma.h:212
DMA_IntSrcTran
@ DMA_IntSrcTran
Definition hal_dma.h:199
DMA_IntDstTran
@ DMA_IntDstTran
Definition hal_dma.h:198
DMA_AllIRQ
@ DMA_AllIRQ
Definition hal_dma.h:202
DMA_IntError
@ DMA_IntError
Definition hal_dma.h:200
DMA_IntTfr
@ DMA_IntTfr
Definition hal_dma.h:196
DMA_IntBlock
@ DMA_IntBlock
Definition hal_dma.h:197
DMA_BurstSize1
@ DMA_BurstSize1
Definition hal_dma.h:149
DMA_BurstSize16
@ DMA_BurstSize16
Definition hal_dma.h:152
DMA_BurstSize128
@ DMA_BurstSize128
Definition hal_dma.h:155
DMA_BurstSize8
@ DMA_BurstSize8
Definition hal_dma.h:151
DMA_BurstSize256
@ DMA_BurstSize256
Definition hal_dma.h:156
DMA_BurstSize4
@ DMA_BurstSize4
Definition hal_dma.h:150
DMA_BurstSize64
@ DMA_BurstSize64
Definition hal_dma.h:154
DMA_BurstSize32
@ DMA_BurstSize32
Definition hal_dma.h:153
DMA_Transfer32BitWidth
@ DMA_Transfer32BitWidth
Definition hal_dma.h:139
DMA_Transfer8BitWidth
@ DMA_Transfer8BitWidth
Definition hal_dma.h:137
DMA_Transfer64BitWidth
@ DMA_Transfer64BitWidth
Definition hal_dma.h:140
DMA_Transfer256BitWidth
@ DMA_Transfer256BitWidth
Definition hal_dma.h:142
DMA_Transfer128BitWidth
@ DMA_Transfer128BitWidth
Definition hal_dma.h:141
DMA_Transfer16BitWidth
@ DMA_Transfer16BitWidth
Definition hal_dma.h:138
_dma_channel_config
Конфигурация канала DMA.
Definition hal_dma.h:278
_dma_channel_config::ctlx_cfg
uint64_t ctlx_cfg
Definition hal_dma.h:282
_dma_channel_config::is_src_periph
bool is_src_periph
Definition hal_dma.h:283
_dma_channel_config::src_addr
void * src_addr
Definition hal_dma.h:279
_dma_channel_config::next_desc
void * next_desc
Definition hal_dma.h:281
_dma_channel_config::dst_addr
void * dst_addr
Definition hal_dma.h:280
_dma_channel_config::is_dst_periph
bool is_dst_periph
Definition hal_dma.h:284
_dma_channel_reg
Дескриптор на регистры канала DMA.
Definition hal_dma.h:233
_dma_channel_reg::SSTATAR_HI
__IOM uint32_t SSTATAR_HI
Definition hal_dma.h:247
_dma_channel_reg::DSTATAR_HI
__IOM uint32_t DSTATAR_HI
Definition hal_dma.h:249
_dma_channel_reg::DSR_LO
__IOM uint32_t DSR_LO
Definition hal_dma.h:254
_dma_channel_reg::SSTAT_LO
__IOM uint32_t SSTAT_LO
Definition hal_dma.h:242
_dma_channel_reg::LLP_HI
__IOM uint32_t LLP_HI
Definition hal_dma.h:239
_dma_channel_reg::CTL_LO
__IOM uint32_t CTL_LO
Definition hal_dma.h:240
_dma_channel_reg::DAR_HI
__IOM uint32_t DAR_HI
Definition hal_dma.h:237
_dma_channel_reg::CFG_LO
__IOM uint32_t CFG_LO
Definition hal_dma.h:250
_dma_channel_reg::CTL_HI
__IOM uint32_t CTL_HI
Definition hal_dma.h:241
_dma_channel_reg::CFG_HI
__IOM uint32_t CFG_HI
Definition hal_dma.h:251
_dma_channel_reg::LLP_LO
__IOM uint32_t LLP_LO
Definition hal_dma.h:238
_dma_channel_reg::DAR_LO
__IOM uint32_t DAR_LO
Definition hal_dma.h:236
_dma_channel_reg::SGR_LO
__IOM uint32_t SGR_LO
Definition hal_dma.h:252
_dma_channel_reg::DSTAT_HI
__IOM uint32_t DSTAT_HI
Definition hal_dma.h:245
_dma_channel_reg::DSTAT_LO
__IOM uint32_t DSTAT_LO
Definition hal_dma.h:244
_dma_channel_reg::DSR_HI
__IOM uint32_t DSR_HI
Definition hal_dma.h:255
_dma_channel_reg::SAR_LO
__IOM uint32_t SAR_LO
Definition hal_dma.h:234
_dma_channel_reg::SSTATAR_LO
__IOM uint32_t SSTATAR_LO
Definition hal_dma.h:246
_dma_channel_reg::SAR_HI
__IOM uint32_t SAR_HI
Definition hal_dma.h:235
_dma_channel_reg::SGR_HI
__IOM uint32_t SGR_HI
Definition hal_dma.h:253
_dma_channel_reg::SSTAT_HI
__IOM uint32_t SSTAT_HI
Definition hal_dma.h:243
_dma_channel_reg::DSTATAR_LO
__IOM uint32_t DSTATAR_LO
Definition hal_dma.h:248
_dma_descriptor
Описатель следующего блока DMA (LLI)
Definition hal_dma.h:222
_dma_descriptor::CTL_LO
__IOM uint32_t CTL_LO
Definition hal_dma.h:226
_dma_descriptor::CTL_HI
__IOM uint32_t CTL_HI
Definition hal_dma.h:227
_dma_descriptor::DAR
__IOM uint32_t DAR
Definition hal_dma.h:224
_dma_descriptor::LLP
__IOM uint32_t LLP
Definition hal_dma.h:225
_dma_descriptor::DSTAT
__IOM uint32_t DSTAT
Definition hal_dma.h:229
_dma_descriptor::SSTAT
__IOM uint32_t SSTAT
Definition hal_dma.h:228
_dma_descriptor::SAR
__IOM uint32_t SAR
Definition hal_dma.h:223
_dma_handle
Управляющая структура передачи
Definition hal_dma.h:296
_dma_handle::user_data
void * user_data
Definition hal_dma.h:298
_dma_handle::base
DMA_Type * base
Definition hal_dma.h:299
_dma_handle::callback
dma_callback callback
Definition hal_dma.h:297
_dma_handle::channel
uint32_t channel
Definition hal_dma.h:300
_dma_multiblock_config
Конфигурация многоблочной передачи
Definition hal_dma.h:306
_dma_multiblock_config::src_incr
uint32_t src_incr
Definition hal_dma.h:314
_dma_multiblock_config::gather_en
bool gather_en
Definition hal_dma.h:311
_dma_multiblock_config::dst_burst_size
uint32_t dst_burst_size
Definition hal_dma.h:313
_dma_multiblock_config::src_data_width
uint32_t src_data_width
Definition hal_dma.h:316
_dma_multiblock_config::dst_addr
void * dst_addr
Definition hal_dma.h:319
_dma_multiblock_config::scatter_en
bool scatter_en
Definition hal_dma.h:310
_dma_multiblock_config::count
uint32_t count
Definition hal_dma.h:307
_dma_multiblock_config::transfer_type
dma_transfer_type_t transfer_type
Definition hal_dma.h:309
_dma_multiblock_config::data_size
uint32_t data_size
Definition hal_dma.h:308
_dma_multiblock_config::src_addr
void * src_addr
Definition hal_dma.h:318
_dma_multiblock_config::dst_data_width
uint32_t dst_data_width
Definition hal_dma.h:317
_dma_multiblock_config::int_en
bool int_en
Definition hal_dma.h:320
_dma_multiblock_config::src_burst_size
uint32_t src_burst_size
Definition hal_dma.h:312
_dma_multiblock_config::dst_incr
uint32_t dst_incr
Definition hal_dma.h:315
dma_channel_ctl_cfg
Описание конфигурации пересылки
Definition hal_dma.h:259
dma_channel_ctl_cfg::dst_incr
uint8_t dst_incr
Definition hal_dma.h:269
dma_channel_ctl_cfg::transfer_type
dma_transfer_type_t transfer_type
Definition hal_dma.h:263
dma_channel_ctl_cfg::scatter_en
bool scatter_en
Definition hal_dma.h:264
dma_channel_ctl_cfg::int_en
bool int_en
Definition hal_dma.h:272
dma_channel_ctl_cfg::gather_en
bool gather_en
Definition hal_dma.h:265
dma_channel_ctl_cfg::llp_dst_en
bool llp_dst_en
Definition hal_dma.h:262
dma_channel_ctl_cfg::src_incr
uint8_t src_incr
Definition hal_dma.h:268
dma_channel_ctl_cfg::dst_tr_width
uint8_t dst_tr_width
Definition hal_dma.h:271
dma_channel_ctl_cfg::src_tr_width
uint8_t src_tr_width
Definition hal_dma.h:270
dma_channel_ctl_cfg::llp_src_en
bool llp_src_en
Definition hal_dma.h:261
dma_channel_ctl_cfg::dst_burst_size
uint8_t dst_burst_size
Definition hal_dma.h:267
dma_channel_ctl_cfg::src_burst_size
uint8_t src_burst_size
Definition hal_dma.h:266
dma_channel_ctl_cfg::block_size
uint16_t block_size
Definition hal_dma.h:260
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